Physical limitations may impede further miniaturization of microelectronics using current lithographically fabricated silicon transistor designs. A key advancement toward overcoming these hurdles was achieved through the construction of a nanocomputer using “bottom–up” methods. The building materials are semiconductor nanowires with diameters less than 20 nm (v.s. current industrial standard of 22 nm). Based on a newly developed “deterministic nanocombing” technique, the synthesized nanowires were assembled into six highly ordered crossbar arrays, with each two forming a logic tile. The common logic tiles were programmed for distinct logic functions and integrated to form a computing architecture. In this way, the constructed nanocomputer can compute, register, and update the internal logic state of the self-contained nanochip according to external stimuli. This rudimentary nanocomputer showcases that more powerful and general nanocomputing capability may be possible by interconnecting additional nanowire logic tiles, and further miniaturization of electronics may be feasible using such nanoprocessors.
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